600+ MHz UltraSPARC-III expected in summer of 1998

Sun says this chip will scale to 1,000 processor systems, but won't say when they will be coming

By Robert McMillan

October  1997
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San Francisco (October 6, 1997) -- Sun Microsystems will announce today that it expects to begin sample production of its next-generation UltraSPARC-III microprocessor by the summer of 1998, with the first systems emerging six to nine months later -- or sometime around early 1999.

UltraSPARC-III Pipeline Characteristics
Issue 4 Integer
2 Floating Point
2 Graphics
L1 Caches 64KB 4-way Data
32KB 4-way Instruction
  2KB 4-way Prefetch
  2KB 4-way Write
L2 Caches 1, 4, 8MB 1-way
On-chip Tags - 90 KB
Off-chip Data - 5ns SRAMs

Gary Lauterbach, chief architect of the UltraSPARC-III, says the chip will have a clock speed in excess of 600 MHz (Megahertz) and, thanks to a design that is "focused on scalability," will be able to scale to over 1,000 processors in a single system. He says the new .25 micron manufacturing process used in the UltraSPARC-III is a "major driver" behind the performance increases, calling them "a two to three times leap from the previous generation [the UltraSPARC-II]."

Recently, in an interview with SunWorld, Bill Russell, general manager for rival Hewlett-Packard's Enterprise Server Group, claimed that his company's Merced chip would boast a 10- to 15-fold performance increase over chips like the UltraSPARC II. With today's revelations from Sun, the gap is narrowed between Sun's publicly announced chip and Intel and HP's still-top-secret Merced product. Claiming superior performance for a completely unannounced product is easy for HP to do. As Dean McCarron, a principal with Phoenix's Mercury Research, says of Merced, "ultimately, it's a lot of marketing until the product shows."

And when will Merced show? Not soon, apparently. The much-anticipated disclosure on IA-64 (Intel architecture-64) at next week's Microprocessor Forum show will contain only, according to an Intel spokesperson, "a very high-level snapshot of the instruction set architecture." News on the actual Merced implementation of IA-64 is not expected until the summer of next year. An actual shipping product is still "several years" away, according to Intel.

UltraSPARC-III Physical Characteristics
CPU Process Technology 0.25 U CMOS
6 layer metal
Core/IO voltages 1.8/1.5 volts
Clock 600+ MHz
Performance @600MHz/8MB 35+/60+ SPECint/ft95
Die Size 330 mm2
Power dissipation at max MHz 70W @1.8v
Transistor Count RAM 12 million
Logic 4 million
Package 1200 pin LGA

Jim Feltdhan, president of Semico Research, says the Ultra-III does more than close the gap between Sun and Intel's unannounced product. "This announcement puts Sun in the ball park of Intel's next-generation processor," he says, adding "by the time they get into production, and they do another rev of this, we'll probably see that they have capabilities of doing something higher than 600 MHz."

McCarron says "the main thing [about UltraSPARC-III] is that the multiprocessing capacity is substantial -- perhaps more than had been initially expected." Nobody is predicting that Sun will come out with a 1,000-processor system any time soon, but McCarron says, "what I would expect is some sort of high-end transaction-oriented server."

With 16 million transistors on the die, each of which can issue up to six instructions per cycle and lower latency due to on-chip L2 cache tags, Lauterbach says system memory has now been increased by a factor of four to eight times. He says instruction set enhancements like byte-shuffle arbitration and Java acceleration have been included and adds, "we've architected a lot of the long wire paths out of the machine."

The UltraSPARC-III will be a 64-bit chip based on the V9 instruction set. Sun says it will be compatible with previous versions of Solaris. According to Sun marketing manager Raza Eltejaein, "previous versions of Solaris will run immediately on the hardware, so there's no need to re-qualify software."

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