Transcription of interview with Greg Papadopoulos
How long have you been with Sun?
One and a half years. I started as CTO of SMCC at the first of this year, (and report to SMCC president Ed Zander. Was the CTO of the server business unit. Before that I was the chief architect of Thinking Machines, (and) on the faculty of MIT. (I) founded Picture-Tel.
We are not only announcing products that are highly scalable and (offer) superb price/performance leadership, and all of the RAS and uptime capabilities. And the solutions. The whole point is to get network computing to penetrate the entire enterprise.
It is software Sun developed. It's a real breakthrough product in its ability to do remote system administration and management. The concept behind the product is to observe the system and do system administration in a lights out remote way. The network is conduct to the system administration actions. It is a important connection, in symon, you notice you are getting a graphic image of the system. When you click on a symon icon you see full photorealistic rendering of the machine you are working on. As you go along through this, you click on a board, and the board comes out, and you can see exactly what's loaded on it. You can see what memory's installed, what processor's installed.
The real innovative part is if you were then to go down and say, "let me look at that processor," and click on that, you get all the information about the processor and its failure history, its temperature. It it is a way of combining a logical view of the system and the physical view.
Right now it's under the Solstice framework. Right now there is, more or less, a proprietary protocol that connects the client, the administrative console, to the server itself. There are a number of plans to make that fully compatible with a MIB interface.
It is designed as part of our platform. It's under the Solstice umbrella. It is all open systems stuff. We don't do anything that's proprietary. It's a matter of what interfaces are being exposed right now. We plan that to be a pretty pervasive framework. We are going to backport symon to existing products. That's really addressing the low systems-level, heartbeat-level of system administration.
It is a software product, but designed into the systems are a lot of things to help in remote diagnostics. The machines are very heavily instrumented. We literally measure everything we can think of, from physical parameters, we have real temperature sensors on CPUs, to airflows to voltages to bus activity. All of our lines are either parity or ECC protected.
The other innovative thing in hardware support. The current products now have a remote power-off and power-on. We have made all of the console connections go though a single, logical console port. And through that port you can remotely power-down the system, power it on, and reset it. You can put that port on the network. That's the way we do it. We were doing a lot of development of our system that were sitting in out lab in Menlo Park, and people in Boston were doing kernel development. People would routinely bring the system into reset. Bring it back up -- all from thousands of miles away.
It can be back-fit to the 20s. Our plan of record is to the 1000s and 2000s.
All of the Ultra computers use the UPA, the UltraSPARC Port Architecture. The UPA (provides) a way to hook processors and I/O devices into the system. Gigaplane connects lots of UPA ports together. In fact, if you look a little deeper into the server architecture, literally look at a desktop system, it has the processor, memory, and I/O, with the UPA switch in the middle. What we've done is take that UPA switch and spread it out across a large system and now connect up to 30 processors in it, and lots of I/O ports. There is a lot of leverage for what we do on the desktop systems and what we do on the server systems.
The peak and theoretical are identical. 2.6 gigabytes per second in the first version of the product. What I mean about the peak being theoretical, we measure that on the systems and it's like the 1000 and 2000 which were designed for very large throughput, the gigaplane was designed for high throughput and low latency. The rough number, the delivered processor/memory/I/O bandwidth is a factor of five higher than the 2000 and it is the latency from processor to memory cache-miss latency is better than a fifth. You just can put a faster processor in an existing architecture. You have to address the throughput and latency (issues).
The gigaplane does share some electrical protocols with XDBus. That's an important bit of continuity, just the reliability of the system and noise immunity, those are very well characterized. The 1000 and 2000 have been exceptionally stable products. We learned from that and have brought the base electrical switching technology forward.
There's an emphasis on throughput in the system. In 1000 and 2000 get a lot out of interconnect on the machines. You can really get very close to their capacity.
The two really big additions we've made, aside from all the throughput that's going on -- it's very aggressive latency. It is very hard to do what we did. You just have to hit every part of the system. The other main failure is that it supports all hot plug-in. So the system has all hot sequencing of all components. Processor, I/O boards, all that can hot-sequence into the gigaplane. That was not possible with the XDBus.
Sixteen slots. Today, we offer in each slot a CPU/memory board which has up to 2 CPUs and up to 2 gigabytes of memory. Those CPUs are modules themselves and you can drop in an UltraSPARC-II. The other board you can put into the center plane is an I/O board, which today can hold a dual 25-MHz, 64-bit SBus board. It has a number of built-in things embedded on it. Built in Fiber-Channel, built-in Fast-Wide SCSI, built-in 100 megabit Ethernet. Plus three SBus slots on two SBuses. We have a 400 megabyte per second channel. Mix-n-match. All you need is at least one processor and at least one I/O board, and "change your compression ratio as you see fit."
I don't want to speak for what went on in the heads of the developers. I can tell you two really big drivers.
It's a very aggressive design. We certainly have a pathway to the future. You've got to keep the systems in balance over time. As much as one worries about binary compatibility... you have to have performance compatibility. There has to be when you take your existing codes and you run them on the new systems they run faster. And you can only do that by continuing to keep the system in balance. I've done things like plot our delivered throughput of our processor memory I/O system vs. the introduction of product, The compound annual growth rate of that delivered bandwidth is 100 percent per year. We are doubling the delivered bandwidth of our products every year. And that's where the very best microprocessors are growing at 60 percent per year.
It's one of those things. People don't see it much in the industry but the SMP system, because they are relatively early in the learning curve cycle in terms of their time-to-volume. There is a tremendous amount of innovation taking place. You get things like this -- our interconnect technology exceeding that of the microprocessor technology. That ain't easy.
This is a Sun-developed technology. We had partnered with Mitsubishi -- they are the supplier of the silicon in the first generation of these systems. That's been a pretty close relationship, It's the same part of Mitsubishi that done the 3D-RAM (found in the UltraSPARC desktop computers) with us. They've been a very important partner to the success of this. The technology and all of the patents are held by Sun.
Technically, yes. As a product we won't support mixed frequencies. For a customer facing upgrading the system we'll do it as an upgrade. They are modules, so all of the memory gets preserved. Because of the interchangability across the line we'll have upgrade programs that... make the conversion and scaling up seamless. We can do that because we can interchange the parts.
Milpitas, CA and Linlithgow, Scotland. We run a very tight manufacturing shop, if you've seen the stats, Sun is very (close to the top in inventory turns and manufacturing efficiency.)
They will see a center plane. The center plane is passive. What's unique is the both processor, memory, and power supply hot insert into the center plane. There are no cables. Because its a center plane it's a very high reliability system. You see a very simple design when you pull all of the components out of it.
Yes, there are a number of ASICs and the processor itself that are shared across. The only things that are field interchangable, are in the SBus (and) the graphics cards. The processor modules are not interchangable.
Hold that thought
This is very significant introduction for us. More than just the technologies we talked about. There is a lot of thought going into what does it take to deploy widespread network-wide computing. What does it take to maintain the rational, centrally administratable models. The rocket is light. We are going off in that direction. You are going to see bigger systems in the future. More capability. More RAS. You'll see that story continue to get better.
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Last updated: 1 April 1996
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