Warp Release 5.0 from Cypress Semiconductor Corp. (programmable logic design tools)
Platforms: Solaris, Windows 95, Windows NT, AIX, HP-UX, and others
Price: contact vendor for prices
URL: http://www.cypress.com
The UltraGen synthesis technology in Warp software uses module generation that automatically searches HDL source code for complex arithmetic and datapath operators, and replaces them with handcrafted circuits already optimized for the target device. This module is generated without user intervention, and gives users the benefit of Cypress's in-depth knowledge of HDLs and device architecture for maximum performance and/or area efficiency.

In Warp2 the synthesis and the fitting is performed in a completely integrated environment, allowing maximum device-specific optimization throughout the entire process. Designing with VHDL or Verilog in Warp also produces design descriptions that are completely device independent. Users can retarget the design to any Cypress device with the push of a button, and can use the description if they wish to convert to an ASIC solution.

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